Fadi ArafehandLi, Jiang 9705fba7b7 [cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948) ...

Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>

2025-10-04 12:16:38 +08:00

..

sgl-kernels

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activation.cpp

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attention.cpp

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cache.cpp

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cpu_types_arm.hpp

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cpu_types_scalar.hpp

[Hardware][RISC-V] Add riscv64 support for vLLM with scalar (#22112)

2025-09-25 20:46:11 +08:00

cpu_types_vsx.hpp

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cpu_types_vxe.hpp

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cpu_types_x86.hpp

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cpu_types.hpp

[Hardware][RISC-V] Add riscv64 support for vLLM with scalar (#22112)

2025-09-25 20:46:11 +08:00

dnnl_helper.cpp

[cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)

2025-10-04 12:16:38 +08:00

dnnl_helper.h

[cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)

2025-10-04 12:16:38 +08:00

dnnl_kernels.cpp

[cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)

2025-10-04 12:16:38 +08:00

float_convert.hpp

[Hardware][RISC-V] Add riscv64 support for vLLM with scalar (#22112)

2025-09-25 20:46:11 +08:00

layernorm.cpp

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mla_decode.cpp

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pos_encoding.cpp

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shm.cpp

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torch_bindings.cpp

[cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)

2025-10-04 12:16:38 +08:00

utils.cpp

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